AMD AMD EPYC™ Embedded 9004 Series Processors
12 published vulnerabilities name this product.
As the CNAs write it in their CVE records (vendor and product); the versions are theirs.
| CVE | Vulnerable versions | Title | Severity | Published | EPSS | Exploitation |
|---|---|---|---|---|---|---|
| CVE-2025-54510 | | A missing lock verification in AMD Secure Processor (ASP) firmware may permit a locally authenticated attacker with administrative privilege | MEDIUM 5.9 | 0.1 % | ||
| CVE-2023-20585 | | Insufficient checks of the RMP on host buffer access in IOMMU may allow an attacker with privileges and a compromised hypervisor to trigger | MEDIUM 5.6 | 0.1 % | ||
| CVE-2025-0031 | | A use after free in the SEV firmware could allow a malicous hypervisor to activate a migrated guest with the SINGLE_SOCKET policy on a diffe | MEDIUM 4.6 | 0.1 % | ||
| CVE-2024-21953 | | Improper input validation in IOMMU could allow a malicious hypervisor to reconfigure IOMMU registers resulting in loss of guest data integri | MEDIUM 5.9 | 0.2 % | ||
| CVE-2024-36354 | | Improper input validation for DIMM serial presence detect (SPD) metadata could allow an attacker with physical access, ring0 access on a sys | HIGH 7.5 | 0.2 % | ||
| CVE-2024-36331 | | Improper initialization of CPU cache memory could allow a privileged attacker with hypervisor access to overwrite SEV-SNP guest memory resul | LOW 3.2 | 0.2 % | ||
| CVE-2023-31351 | | Improper restriction of operations in the IOMMU could allow a malicious hypervisor to access guest private memory resulting in loss of integ | MEDIUM 5.3 | 0.1 % | ||
| CVE-2024-21977 | | Incomplete cleanup after loading a CPU microcode patch may allow a privileged attacker to degrade the entropy of the RDRAND instruction, pot | LOW 3.2 | 0.1 % | ||
| CVE-2024-36357 | | A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in th | MEDIUM 5.6 | 0.4 % | ||
| CVE-2024-36350 | | A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting i | MEDIUM 5.6 | 0.5 % | ||
| CVE-2024-36348 | | A transient execution vulnerability in some AMD processors may allow a user process to infer the control registers speculatively even if UMI | LOW 3.8 | 0.3 % | ||
| CVE-2024-36349 | | A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, pote | LOW 3.8 | 0.2 % |