AMD AMD EPYC™ Embedded 8004 Series Processors
21 published vulnerabilities name this product.
As the CNAs write it in their CVE records (vendor and product); the versions are theirs.
| CVE | Vulnerable versions | Title | Severity | Published | EPSS | Exploitation |
|---|---|---|---|---|---|---|
| CVE-2025-54509 | | Improper access control for register interface in the Input-Output Memory Management Unit (IOMMU) could allow a privileged attacker to cause | MEDIUM 4.0 | 0.1 % | ||
| CVE-2025-0045 | | Improper Input validation in the AMD Secure Processor (ASP) PCI driver may allow a local attacker to create a buffer overflow condition, pot | MEDIUM 6.9 | 0.1 % | ||
| CVE-2026-0432 | | Incorrect default permissions in the installation directory for the AMD chipset driver could allow an attacker to achieve privilege escalati | HIGH 8.5 | 0.1 % | ||
| CVE-2025-48521 | | Improper input validation in the AMD Secure Processor (ASP) PCI driver could allow a local attacker to trigger a Use-After-Free (UAF) condit | MEDIUM 6.9 | 0.1 % | ||
| CVE-2025-48512 | | Incorrect default permissions in the installation directory for the AMD general-purpose input/output controller (GPIO) could allow an attack | HIGH 7.0 | 0.1 % | ||
| CVE-2024-36315 | | Improper enforcement of the LFENCE serialization property may allow an attacker to bypass speculation barriers and potentially disclose sens | MEDIUM 5.7 | 0.1 % | ||
| CVE-2025-61972 | | Missing lock bit protection for NBIO registers could allow a local admin-privileged attacker to gain arbitrary System Management Network (SM | HIGH 8.5 | 0.1 % | ||
| CVE-2025-61971 | | Missing lock bit protection for NBIO registers could allow a local admin-privileged attacker to modify MMIO routing configurations, potentia | MEDIUM 5.9 | 0.1 % | ||
| CVE-2025-54510 | | A missing lock verification in AMD Secure Processor (ASP) firmware may permit a locally authenticated attacker with administrative privilege | MEDIUM 5.9 | 0.1 % | ||
| CVE-2023-31364 | | Improper handling of direct memory writes in the input-output memory management unit could allow a malicious guest virtual machine (VM) to f | HIGH 8.3 | 0.3 % | ||
| CVE-2025-0031 | | A use after free in the SEV firmware could allow a malicous hypervisor to activate a migrated guest with the SINGLE_SOCKET policy on a diffe | MEDIUM 4.6 | 0.1 % | ||
| CVE-2025-48514 | | Insufficient Granularity of Access Control in SEV firmware can allow a privileged attacker to create a SEV-ES Guest to attack SNP guest, pot | MEDIUM 4.0 | 0.2 % | ||
| CVE-2025-48509 | | Missing Checks in certain functions related to RMP initialization can allow a local admin privileged attacker to cause misidentification of | LOW 1.8 | 0.1 % | ||
| CVE-2025-29939 | | Improper access control in secure encrypted virtualization (SEV) could allow a privileged attacker to write to the reverse map page (RMP) du | MEDIUM 6.9 | 0.2 % | ||
| CVE-2025-29950 | | Improper input validation in system management mode (SMM) could allow a privileged attacker to overwrite stack memory leading to arbitrary c | HIGH 7.1 | 0.2 % | ||
| CVE-2025-52536 | | Improper Prevention of Lock Bit Modification in SEV firmware could allow a privileged attacker to downgrade firmware potentially resulting i | MEDIUM 6.7 | 0.2 % | ||
| CVE-2025-29934 | | A bug within some AMD CPUs could allow a local admin-privileged attacker to run a SEV-SNP guest using stale TLB entries, potentially resulti | MEDIUM 5.3 | 0.1 % | ||
| CVE-2024-36357 | | A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in th | MEDIUM 5.6 | 0.4 % | ||
| CVE-2024-36350 | | A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting i | MEDIUM 5.6 | 0.5 % | ||
| CVE-2024-36348 | | A transient execution vulnerability in some AMD processors may allow a user process to infer the control registers speculatively even if UMI | LOW 3.8 | 0.3 % | ||
| CVE-2024-36349 | | A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, pote | LOW 3.8 | 0.2 % |