Side-channels Related to the x86 PREFETCH Instruction (AMD All supported processors)

CVE-2021-26318
MEDIUM 4.7

At a glance

Source
NVD
EPSS
EPSS 0.33 % Β· percentile 26 ()
State
PUBLISHED
Published
Updated
Assigner
AMD
NVD status
Modified

Description

A timing and power-based side channel attack leveraging the x86 PREFETCH instructions on some AMD CPUs could potentially result in leaked kernel address space information.

Weaknesses (CWE)

  • CWE-208 β€” Observable Timing Discrepancy
  • CWE-203 β€” Observable Discrepancy

References

Scores

VersionScoreVectorScored by
CVSS 3.1MEDIUM 4.7CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:NNVD Β· nvd@nist.gov (Primary)
CVSS 2.0LOW 1.9AV:L/AC:M/Au:N/C:P/I:N/A:NNVD Β· nvd@nist.gov (Primary)

European references

Affected configurations (NVD CPE)

Affected products

ProductVersions
AMD Β· All supported processorsaffected unspecified < undefined

Sources

SourceLicence
CVE List (CVEProject cvelistV5)CVE Program Terms of Use
EPSS (FIRST.org)FIRST β€” attribution requested
ENISA EUVDENISA β€” reproduction authorised, source acknowledged
NVD (NIST) via fkie-cad/nvd-json-data-feedsPublic domain β€” this product uses data from the NVD API but is not endorsed or certified by the NVD