Intel(R) Stratix(R) 10 FPGA firmware provided with the Intel(R) Quartus(R) Prime Pro software
At a glance
- Source
- NVD
- EPSS
- EPSS 0.36 % · percentile 30 ()
- State
- PUBLISHED
- Published
- Updated
- Assigner
- intel
- NVD status
- Modified
Description
Improper buffer restrictions in the Intel(R) Stratix(R) 10 FPGA firmware provided with the Intel(R) Quartus(R) Prime Pro software before version 20.2 may allow an unauthenticated user to potentially enable escalation of privilege via physical access.
References
Scores
| Version | Score | Vector | Scored by |
|---|---|---|---|
| CVSS 3.1 | MEDIUM 6.8 | CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H | NVD · nvd@nist.gov (Primary) |
| CVSS 2.0 | MEDIUM 4.6 | AV:L/AC:L/Au:N/C:P/I:P/A:P | NVD · nvd@nist.gov (Primary) |
European references
- ENISA EUVD · EUVD-2020-4624
- GCVE · GCVE-0-2020-12312
CERT-FR advisories
- CERTFR-2020-AVI-734 — Multiples vulnérabilités dans les produits Intel · cert.ssi.gouv.fr
Affected configurations (NVD CPE)
cpe:2.3:a:intel:quartus_prime_pro:*:*:*:*:*:*:*:*< 20.2cpe:2.3:o:intel:stratix_10_fpga_firmware:-:*:*:*:*:*:*:*
Affected products
| Product | Versions |
|---|---|
| Intel(R) Stratix(R) 10 FPGA firmware provided with the Intel(R) Quartus(R) Prime Pro software | affected before version 20.2 |
Sources
| Source | Licence |
|---|---|
| CVE List (CVEProject cvelistV5) | CVE Program Terms of Use |
| EPSS (FIRST.org) | FIRST — attribution requested |
| ENISA EUVD | ENISA — reproduction authorised, source acknowledged |
| CERT-FR (ANSSI) | Licence Ouverte / Etalab 2.0 |
| NVD (NIST) via fkie-cad/nvd-json-data-feeds | Public domain — this product uses data from the NVD API but is not endorsed or certified by the NVD |